Ace's wist een aantal onbevestigde geruchten bijeen te harken over de 64-bit uitbreidingen die AMD met de Sledgehammer over de fossiele x86 instructieset wil petsen:
Information is probably not the best terminology to use here, but "strong indications" nonetheless. Talking with some sources close to AMD about the company's upcoming x86-64 extensions, it is likely that x86-64 will include additional integer registers, and extra processor mode to use the registers, 32 and 64-bit instructions for those registers, and potentially some form of multithreading (SMT seems to be becoming rather popular) and/or multi-core dies. A friend of mine had this to say about it:
"x86-64 processors will look a lot like a fast-decodable RISC job with some kind of instruction compression -- basically, retaining the x86 characteristic of being stingy on memory consumption and bandwidth, but making things easily decodable/generatable (by a compiler, that is) and easing the tremendous register pressure in the architecture."
I must admit I was quite hesitant early on to even *want* to consider an additional extension to the already over-sized and aging x86 ISA, but this could be interesting...