Ach...en dan hier nog even wat de compiler extra biedt ten opzichte van de al bestaande 32 bit compiler van hun:
• Support for 64-bit addressing and aggregate data sets in excess of the 2GB limit on X86-32 processor-based systems
• Support for 64-bit integer arithmetic in hardware
• Use of the extended general-purpose register set available on AMD Opteron processors (16 general-purpose registers instead of the 8 available on current X86-32 processor-based systems)
• Use of the extended Streaming SIMD Extensions (SSE) register set available on AMD Opteron processors (16 SSE registers instead of the 8 available on current X86-32 processor-based systems)
• All 32-bit and 64-bit floating-point arithmetic is performed using SSE instructions
• A number of general-purpose optimizations have been made to improve register allocation, vectorization, scalar arithmetic, loop unrolling and various other optimization phases within the
compilers
• When the –g compiler option is specified, the compilers emit debug information in DWARF2 format (previous releases generated DWARF1 debug information)
• Subroutine and function calling sequences are modified to comply with the X86-64 Application Binary Interface, which can be found online at
http://www.x86-64.org/documentation
• The compilers themselves are 64-bit applications, and are only operational on AMD Opteron processor-based systems (i.e. they are native compilers rather than cross compilers).