Ook The Register rapporteerd over de AMD presentaties op het Microprocessor Forum. Duidelijk wordt dat AMD nu serieus mee wil gaan spelen in het high-end segment, met snellere, SMP compatible versies van de Athlon, een nieuwe LDB I/O bus en de 64-bit SledgeHammer processor:
Central to Athlon's extended multi-processor role will be what AMD is calling the Lightning Data Transport (LDT), which was designed to provide a single, unified connection mechanism linking processor and North Bridge to multiple bus technologies -- PCI, System I/O (the combination of the NG I/O and Future I/O initiatives), etc. -- but neatly also serves as a multi-processor communication channel.
AMD will offer the new Athlon in a dual-CPU module which connects both processors to the North Bridge chipset (via an Alpha EV6 bus) and from thence to the AGP graphics card and the system DRAM. Plug four of these together and -- bingo -- you have an eight-way MP system. LDT is a point-to-point interconnect providing a throughput of up to 6.4GBps each way and a channel width of 8, 16 or 32 bits.
The 'Athlon Xeon' and LDT should ship sometime in 2000, the company said. Later, AMD will introduce its x86-64 ISA which will involve a further modification of the processor -- assuming it's not being held back for K8, of course -- that is essentially a 64-bit version of its current x86 implementation but allows the processor to behave as a 32-bit chip, when it's running existing 32-bit apps.
x84-64 will also sport some additional "specialised operations" to the x86 set and add what AMD calls "technical floating point instructions", which appear extend 3D Now! to something closer to Motorola's AltiVec technology than Intel's SSE.
Zie The Register voor de complete info.