Bij Sysopt.com is een artikel geplaatst over de werking QDR SRAM. De technologie is ontwikkeld door drie grote geheugenboeren, te weten Micron Technology, Cypress Semiconductor en IDT (het QDR SDRAM Consortium). Dit artikel is vooral interessant omdat dezelfde techniek ook op SDRAM zal worden toegepast, en we in de toekomst misschien QDR geheugen op onze videokaarten en moederborden hebben zitten:
QDR SRAM is currently being manufactured using a low-power CMOS fabrication process. At the heart of the QDR architecture are two separate double data rate (DDR) ports to allow simultaneous access to the memory storage array. Each port is dedicated, with one performing read operations while the other performs data writes. By allowing two-way access to the memory array at DDR signaling rates, a quad data rate (QDR) is established.
Although it looks complex, QDR SRAM uses a very simple data storage method. The system employs dual circuitry for both the address registers and logic controllers. The dual nature allows for the dual port architecture. While the WRITE port stores data into the memory storage array, the READ port can simultaneously retrieve data from it. A single reference clock generator controls the speeds of both ports. One signal is passed to both logic controllers, resulting in a smooth flow of data. The clock generator controls the speed of the read and write data registers, providing consistent core bandwidth and operating rates. If individual timing signals were employed for each circuit, the signals could be slightly mismatched, thus resulting in a stall or crash of the memory system.
De schrijver verwacht dat het nieuwe QDR SRAM snel de standaard zal worden in bijvoorbeeld PDA's en digitale cameras, vanwege de goede snelheid en het lage stroomverbruik. Lees de rest van het artikel hier.