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Software-update: Xen 4.13.2 / 4.12.4

Xen is een baremetal-hypervisor voor het x86- en ARMv7/v8-platform, en laat diverse besturingssystemen gelijktijdig op één systeem draaien zonder de prestaties drastisch te beïnvloeden. Voor meer informatie over Xen en de bijbehorende community verwijzen we naar deze en deze pagina. Op dit moment worden alleen Linux, NetBSD en FreeBSD als hostsystemen ondersteund, maar men is druk bezig om ook andere besturingssystemen volledig te ondersteunen. De ontwikkelaars hebben versies 4.13.2 en 4.12.4 uitgebracht, met de volgende aankondigingen:

XEN PROJECT 4.13.2

We are pleased to announce the release of Xen 4.13.2. This is available immediately from its git repository https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=refs/heads/stable-4.13 (tag RELEASE-4.13.2) or from this download page

This release contains the following bug-fixes and improvements in the Xen Project hypervisor:
  • 0060ac29bc: update Xen version to 4.13.2
  • 28b7817127: x86/pv: Flush TLB in response to paging structure changes
  • c10b2931bf: x86/pv: Drop FLUSH_TLB_GLOBAL in do_mmu_update() for XPTI
  • dc38c1103c: hvmloader: flip “ACPI data” to “ACPI NVS” type for ACPI table region
  • b05fe1533b: x86/mwait-idle: customize IceLake server support
  • 82a28743da: x86: fix resource leaks on arch_vcpu_create() error path
  • c32e9be04a: x86/vLAPIC: don’t leak regs page from vlapic_init() upon error
  • fa9e1f73bf: xen/domain: check IOMMU options doesn’t contain unknown bits set
  • ca95985a64: evtchn/fifo: use stable fields when recording “last queue” information
  • 055a5d540b: x86/pv: Don’t deliver #GP for a SYSENTER with NT set
  • ff1fd42f0d: x86/pv: Don’t clobber NT on return-to-guest
  • e891c288cc: AMD/IOMMU: ensure suitable ordering of DTE modifications
  • 3009e4d6b4: AMD/IOMMU: update live PTEs atomically
  • 1c86c83030: AMD/IOMMU: convert amd_iommu_pte from struct to union
  • 745652fec9: IOMMU: hold page ref until after deferred TLB flush
  • 6e237b6160: IOMMU: suppress “iommu_dont_flush_iotlb” when about to free a page
  • 98ec9711e5: x86/mm: Prevent some races in hypervisor mapping updates
  • 7f5d6760b6: x86/mm: Refactor modify_xen_mappings to have one exit path
  • a2c0c91b3e: x86/mm: Refactor map_pages_to_xen to have only a single exit path
  • 8e7e5857a2: evtchn/Flask: pre-allocate node on send path
  • 88f5b414ac: x86/HVM: more consistently set I/O completion
  • f63b20a213: hvmloader: indicate ACPI tables with “ACPI data” type in e820
  • b015fbe509: evtchn: arrange for preemption in evtchn_reset()
  • 54becf611d: evtchn: arrange for preemption in evtchn_destroy()
  • 43572a4cd9: evtchn: address races with evtchn_reset()
  • 21054297bf: evtchn: convert per-channel lock to be IRQ-safe
  • a8122e991d: evtchn: evtchn_reset() shouldn’t succeed with still-open ports
  • e1364e05f9: evtchn/x86: enforce correct upper limit for 32-bit guests
  • 5867a14ac1: xen/evtchn: Add missing barriers when accessing/allocating an event channel
  • 0537543cc1: x86/pv: Avoid double exception injection
  • ae922b9fc2: evtchn: relax port_is_valid()
  • f27980a330: x86/MSI-X: restrict reading of table/PBA bases from BARs
  • b7fcbe0150: x86/msi: get rid of read_msi_msg
  • 42fcdd4232: x86/vpt: fix race when migrating timers between vCPUs
  • 286b3539b7: xen/memory: Don’t skip the RCU unlock path in acquire_resource()
  • b98031951d: x86/pv: Handle the Intel-specific MSR_MISC_ENABLE correctly
  • aa1d9a7dbf: xen/arm: cmpxchg: Add missing memory barriers in __cmpxchg_mb_timeout()
  • bd63ab538b: xen/arm: Missing N1/A76/A75 FP registers in vCPU context switch
  • 4fb1ad782d: xen/arm: Update silicon-errata.txt with the Neovers AT erratum
  • 4a0c174c17: xen/arm: Enable CPU Erratum 1165522 for Neoverse
  • 6ef4daddc7: arm: Add Neoverse N1 processor identification
  • c663fa577b: x86/pv: Rewrite segment context switching from scratch
  • 761e8df102: x86/pv: Fix consistency of 64bit segment bases
  • 64690393a8: x86/pv: Fix multiple bugs with SEGBASE_GS_USER_SEL
  • b9083432f1: x86/intel: Expose MSR_ARCH_CAPS to dom0
  • ac4ec487e0: x86: Begin to introduce support for MSR_ARCH_CAPS
  • a7f0434093: x86: use constant flags for section .init.rodata
  • 0861885b5f: x86/ioapic: Fix fixmap error path logic in ioapic_init_mappings()
  • 9b367b2b0b: x86/hvm: set ‘ipat’ in EPT for special pages
  • e1829658a0: x86emul: replace UB shifts
  • befa216803: x86/cpuid: Fix APIC bit clearing
  • e9e72fb157: x86/S3: put data segment registers into known state upon resume
  • b67bb90a6b: x86: restore pv_rtc_handler() invocation
  • fff1874b61: x86/spec-ctrl: Protect against CALL/JMP straight-line speculation
  • ec972cb418: mm: fix public declaration of struct xen_mem_acquire_resource
  • d967a2bcd3: x86/msr: Disallow access to Processor Trace MSRs
  • 665f5c1271: x86/acpi: use FADT flags to determine the PMTMR width
  • ddb6fd3f9c: x86/vmx: use P2M_ALLOC in vmx_load_pdptrs instead of P2M_UNSHARE
  • 378321bb1f: xen: Check the alignment of the offset pased via VCPUOP_register_vcpu_info
  • 572e349de1: x86/ept: flush cache when modifying PTEs and sharing page tables
  • 0c8c10d12e: vtd: optimize CPU cache sync
  • 493e143a82: x86/alternative: introduce alternative_2
  • 8b9be8f415: vtd: don’t assume addresses are aligned in sync_cache
  • f1055a202d: x86/iommu: introduce a cache sync hook
  • 005d5eaa45: vtd: prune (and rename) cache flush functions
  • 1c7a98cab9: vtd: improve IOMMU TLB flush
  • 2b34d8cd73: x86/ept: atomically modify entries in ept_next_level
  • 56e117f504: x86/EPT: ept_set_middle_entry() related adjustments
  • 7a76deb101: x86/shadow: correct an inverted conditional in dirty VRAM tracking
  • 3e41b727f7: xen/common: event_channel: Don’t ignore error in get_free_port()
  • 9f7e8bac4c: libacpi: widen TPM detection
  • cdd8f958d6: x86/passthrough: introduce a flag for GSIs not requiring an EOI or unmask
  • a9d46ba332: x86/passthrough: do not assert edge triggered GSIs for PVH dom0
  • 05ba427181: ioreq: handle pending emulation racing with ioreq server destruction
  • 780d3761f1: x86/Intel: insert Ice Lake and Comet Lake model numbers
  • 31c5d84c51: x86/rtc: provide mediated access to RTC for PVH dom0
  • 27d4f1ac67: build: fix dependency tracking for preprocessed files
  • 11ea967c99: x86/svm: do not try to handle recalc NPT faults immediately
  • 53bafb59e9: x86/ucode: Fix errors with start/end_update()
  • b4afe058c6: x86/boot: Fix load_system_tables() to be NMI/#MC-safe
  • 74ce65c012: build32: don’t discard .shstrtab in linker script
  • 0243559f45: x86/mm: do not attempt to convert _PAGE_GNTTAB to a boolean
  • 8ad99de837: x86emul: rework CMP and TEST emulation
  • ea7e8d2aa9: x86emul: address x86_insn_is_mem_{access,write}() omissions
  • 350aaca679: x86/hvm: Improve error information in handle_pio()
  • c3eea2cfc8: VT-x: extend LBR Broadwell errata coverage
  • 05232254ba: x86: clear RDRAND CPUID bit on AMD family 15h/16h
  • 672976cfbb: xen/trace: Don’t dump offline CPUs in debugtrace_dump_worker()
  • a6f2080523: x86/idle: Extend ISR/C6 erratum workaround to Haswell
  • c437e06ba2: x86/idle: prevent entering C3/C6 on some Intel CPUs due to errata
  • 0a85f84e65: x86/idle: prevent entering C6 with in service interrupts on Intel
  • 85ac008352: x86/idle: rework C6 EOI workaround
  • 7f6b66d71f: x86: determine MXCSR mask in all cases
  • 04aedf4048: x86/hvm: Fix shifting in stdvga_mem_read()
  • f2ad77ba78: sched: allow rcu work to happen when syncing cpus in core scheduling
  • d61fef6c41: x86/PVH: PHYSDEVOP_pci_mmcfg_reserved should not blindly register a region
  • eccc242b59: x86/build: Unilaterally disable -fcf-protection
  • 6bfb364c3c: x86/build: move -fno-asynchronous-unwind-tables into EMBEDDED_EXTRA_CFLAGS
  • bdddd33ff2: x86/build32: Discard all orphaned sections
  • 7d57caa9a2: x86/guest: Fix assembler warnings with newer binutils
  • d74eb10956: sched: always modify vcpu pause flags atomically
  • 9eec3eecad: cpupool: fix removing cpu from a cpupool
  • d112db32c6: x86/cpuidle: correct Cannon Lake residency MSRs
  • 333519f5a8: update Xen version to 4.13.2-pre
  • c54de7d9df: tools/libxl: Fix memory leak in libxl_cpuid_set()
  • d8e1053bfa: x86/spec-ctrl: Update docs with SRBDS workaround
  • 67958a166f: x86/spec-ctrl: Mitigate the Special Register Buffer Data Sampling sidechannel
  • 9aefa01f45: x86/spec-ctrl: CPUID/MSR definitions for Special Register Buffer Data Sampling
XEN PROJECT 4.12.4

We are pleased to announce the release of Xen 4.12.4. This is available immediately from its git repository https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=refs/heads/stable-4.12 (tag RELEASE-4.12.4) or from this download page

This release contains the following bug-fixes and improvements in the Xen Project hypervisor:
  • 97b7b5567f: update Xen version to 4.12.4
  • 4100d463db: x86/pv: Flush TLB in response to paging structure changes
  • b1d6f37aa5: x86/pv: Drop FLUSH_TLB_GLOBAL in do_mmu_update() for XPTI
  • 0108b011e1: hvmloader: flip “ACPI data” to “ACPI NVS” type for ACPI table region
  • 5d49509a66: x86/mwait-idle: customize IceLake server support
  • f49fff9072: x86: fix resource leaks on arch_vcpu_create() error path
  • 7488b405b4: x86/vLAPIC: don’t leak regs page from vlapic_init() upon error
  • a9382052b8: evtchn/fifo: use stable fields when recording “last queue” information
  • 68ff540de1: x86/pv: Don’t deliver #GP for a SYSENTER with NT set
  • 1833c60701: x86/pv: Don’t clobber NT on return-to-guest
  • 14b0a080c1: AMD/IOMMU: ensure suitable ordering of DTE modifications
  • 97f9defe96: AMD/IOMMU: update live PTEs atomically
  • b402e2a14b: IOMMU: hold page ref until after deferred TLB flush
  • 37f45de908: IOMMU: suppress “iommu_dont_flush_iotlb” when about to free a page
  • e461318da3: x86/mm: Prevent some races in hypervisor mapping updates
  • 1cec2531fb: x86/mm: Refactor modify_xen_mappings to have one exit path
  • 03926de91c: x86/mm: Refactor map_pages_to_xen to have only a single exit path
  • 6888017392: evtchn/Flask: pre-allocate node on send path
  • 0186e76a62: x86/HVM: more consistently set I/O completion
  • 0ca821f197: hvmloader: indicate ACPI tables with “ACPI data” type in e820
  • cfd61e688f: evtchn: arrange for preemption in evtchn_reset()
  • 2aa4864b8a: evtchn: arrange for preemption in evtchn_destroy()
  • 8e25d522a3: evtchn: address races with evtchn_reset()
  • 9c2a02740f: evtchn: convert per-channel lock to be IRQ-safe
  • 9dda47cb70: evtchn: evtchn_reset() shouldn’t succeed with still-open ports
  • b8c9776986: evtchn/x86: enforce correct upper limit for 32-bit guests
  • 253a1e64d3: xen/evtchn: Add missing barriers when accessing/allocating an event channel
  • 3e039e12ec: x86/pv: Avoid double exception injection
  • b2db00754f: evtchn: relax port_is_valid()
  • 1dfd2e2f65: x86/MSI-X: restrict reading of table/PBA bases from BARs
  • 76a0760f6c: x86/msi: get rid of read_msi_msg
  • d28c52ee2a: x86/vpt: fix race when migrating timers between vCPUs
  • 8b8fff26f5: xen/memory: Don’t skip the RCU unlock path in acquire_resource()
  • 320e7a7369: x86/pv: Handle the Intel-specific MSR_MISC_ENABLE correctly
  • 0446e3db13: xen/arm: cmpxchg: Add missing memory barriers in __cmpxchg_mb_timeout()
  • a81e6557b9: xen/arm: Missing N1/A76/A75 FP registers in vCPU context switch
  • caebaf3751: xen/arm: Update silicon-errata.txt with the Neovers AT erratum
  • 76d934929b: xen/arm: Enable CPU Erratum 1165522 for Neoverse
  • 81564c40ea: arm: Add Neoverse N1 processor identification
  • ff79981ecb: x86/pv: Rewrite segment context switching from scratch
  • 3186568505: x86/pv: Fix consistency of 64bit segment bases
  • 40e0cf8108: x86/pv: Fix multiple bugs with SEGBASE_GS_USER_SEL
  • fbf016f2b2: x86/intel: Expose MSR_ARCH_CAPS to dom0
  • 8c1c3e7d25: x86: Begin to introduce support for MSR_ARCH_CAPS
  • 5bd49ca50e: x86: use constant flags for section .init.rodata
  • e0bd8996b4: x86/ioapic: Fix fixmap error path logic in ioapic_init_mappings()
  • c481b9f32d: libx86: introduce a helper to deserialise msr_policy objects
  • 1336ca1774: x86/hvm: set ‘ipat’ in EPT for special pages
  • dca9cc7db6: x86emul: replace UB shifts
  • 07fd5d3598: x86/cpuid: Fix APIC bit clearing
  • 85ce36d12b: x86/S3: put data segment registers into known state upon resume
  • df9a0ad1f8: x86/spec-ctrl: Protect against CALL/JMP straight-line speculation
  • 7cce3f25a1: mm: fix public declaration of struct xen_mem_acquire_resource
  • 43258cec14: x86/msr: Disallow access to Processor Trace MSRs
  • a1aae54189: x86/acpi: use FADT flags to determine the PMTMR width
  • df11056150: x86/vmx: use P2M_ALLOC in vmx_load_pdptrs instead of P2M_UNSHARE
  • 19e0bbb4eb: xen: Check the alignment of the offset pased via VCPUOP_register_vcpu_info
  • d96c0f1ed5: x86/ept: flush cache when modifying PTEs and sharing page tables
  • 653811e2d2: vtd: optimize CPU cache sync
  • 26072a508d: x86/alternative: introduce alternative_2
  • b292255ea2: vtd: don’t assume addresses are aligned in sync_cache
  • 38dc269ea4: x86/iommu: introduce a cache sync hook
  • 5733de6b88: vtd: prune (and rename) cache flush functions
  • d69f3058d8: vtd: improve IOMMU TLB flush
  • 8faa45e25e: x86/ept: atomically modify entries in ept_next_level
  • 731bdaf416: x86/EPT: ept_set_middle_entry() related adjustments
  • ec57b9af27: x86/shadow: correct an inverted conditional in dirty VRAM tracking
  • a634229ecf: xen/common: event_channel: Don’t ignore error in get_free_port()
  • 050fe48dc9: libacpi: widen TPM detection
  • 436ec68ea2: ioreq: handle pending emulation racing with ioreq server destruction
  • 96e8abab83: x86/Intel: insert Ice Lake and Comet Lake model numbers
  • 7cdc0cff95: build: fix dependency tracking for preprocessed files
  • d937532ff5: x86/svm: do not try to handle recalc NPT faults immediately
  • 7641573b33: build32: don’t discard .shstrtab in linker script
  • 7eed533a8b: x86/mm: do not attempt to convert _PAGE_GNTTAB to a boolean
  • 74a1230224: x86emul: rework CMP and TEST emulation
  • 946113a444: x86emul: address x86_insn_is_mem_{access,write}() omissions
  • 6182e5dd89: x86/hvm: Improve error information in handle_pio()
  • ad20170c71: VT-x: extend LBR Broadwell errata coverage
  • 218a19b911: x86/boot: Fix load_system_tables() to be NMI/#MC-safe
  • aca68b9ca9: x86: clear RDRAND CPUID bit on AMD family 15h/16h
  • 1f581f966a: x86/idle: Extend ISR/C6 erratum workaround to Haswell
  • 4969f34b49: x86/idle: prevent entering C3/C6 on some Intel CPUs due to errata
  • ed44947e18: x86/idle: prevent entering C6 with in service interrupts on Intel
  • 2eb277ec76: x86/idle: rework C6 EOI workaround
  • b3af150fd4: x86: determine MXCSR mask in all cases
  • f769c99f92: x86/hvm: Fix shifting in stdvga_mem_read()
  • bcdaffc589: x86/build: Unilaterally disable -fcf-protection
  • 2b10a3238a: x86/build: move -fno-asynchronous-unwind-tables into EMBEDDED_EXTRA_CFLAGS
  • a022f3679a: x86/build32: Discard all orphaned sections
  • dd49ddf0eb: x86/guest: Fix assembler warnings with newer binutils
  • bc775d06d0: x86/cpuidle: correct Cannon Lake residency MSRs
  • be5c240252: update Xen version to 4.12.4-pre
  • 06760c2bf3: tools/libxl: Fix memory leak in libxl_cpuid_set()
  • d58c48df8c: x86/spec-ctrl: Allow the RDRAND/RDSEED features to be hidden
  • 199ae1f158: x86/spec-ctrl: Mitigate the Special Register Buffer Data Sampling sidechannel
  • 9dc2842940: x86/spec-ctrl: CPUID/MSR definitions for Special Register Buffer Data Sampling
Versienummer 4.13.2 / 4.12.4
Releasestatus Final
Besturingssystemen Linux, BSD
Website Xen Project
Download https://xenproject.org/downloads/
Licentietype Voorwaarden (GNU/BSD/etc.)

Door Japke Rosink

Meukposter

14-11-2020 • 01:37

0 Linkedin

Bron: Xen Project

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