JC, bekend van het informatieve JC's News'n'Links, heeft een interessante posting geplaatst in een Slashdot thread over de Intel Northwood (waarvan inmiddels bekend is dat het de codenaam is voor mobile Willamette):
The Willamette is Intel's first new core since the P6 back in the mid 90s, which found itself inside the Pentium Pro, II, III, and Celeron. Rumours and admissions declare the below to be its likely improvements:A deeper (or smoother, at least) instruction pipeline for stronger frequency ramping Added execution pipelines and functional units (eg, allowing it to issue more instructions per cycle) A "trace cache", to optimize the order in which instructions are fed into the pipelines (I admit, I could be screwing up this particular explanation) variable frequency units -- this one's a leap of faith, but tentatively according to some sources, different parts of the cpu will be clocked at different rates. A 2GHz Willamette chip might have a 2GHz integer unit, a 1.7GHz fpu, and a 1.5GHz SSE unit (mind you, this is a speculative example, with numbers picked out of the air) An improved motherboard bus, capable of 200MT/s (100MHz, double pumped) but also 128-bit, twice the width of the Athlon's EV-6, allowing for twice the peak bandwidth. Also, quadruple pumped (400MT/s) for the later server version, codenamed Foster. On the other hand, it will still be a shared bus, which is supposedly less "clean" than a point to point protocol that the Athlon uses, meaning that high-way SMP may get lots of collisions and degraded performance on Willamette.
Het was al bekend dat Willamette gebruik zou maken van een 'trace cache' en een 128-bit double data rate bus. Dat gedeelte over variabele frequency units is nieuw voor mij, klinkt erg interessant.
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