Motorola zal in februari tijdens de IEEE International Solid-state Circuits conference een 780MHz versie van de opgefrisde PowerPC G4+ processor demonstreren. De chip krijgt een langere pipeline om hogere kloksnelheden mogelijk te maken en zal voorzien zijn van 256Kb on-die L2 cache:
The chip, the PowerPC G4+, was announced last month at Microprocessor Forum, and is the product of a major attempt by Motorola to catch up with the x86 world's lead in megaHertz. The PowerPC family has always been rather faster than x86 chips of equivalent clock speed, but of late x86 frequencies have shot so far ahead of PowerPC's that the Motorola chip has ended up looking decidedly underpowered.
Whether Motorola will demonstrate the chip in action remains to be seen. However, the PowerPC design team members presenting their paper at the ISC conference will detail its operation at up to 780MHz.
That's disappointing. When the chip was first discussed, Motorola said it would operate at around 700MHz but "with plenty of headroom for where we want to go", meaning scope for much higher clock speeds. The extra 80MHz doesn't seem that much headroom, frankly.
[...] The abstract for Motorola's ISC paper offers little more information about the G4+ than we knew already -- its dual (instruction and data) 32K L1 caches, 256K on-die L2 and support for up to 2MB of backside L3 cache were revealed at Microprocessor Forum.