Bij Sharky Extreme is deel 5 te vinden van zijn memory guide. Deze keer gaat het over timing, bandbreedte en je dat kan verbeteren met cache geheugen. Goede technische stuf:
The maximum memory throughput in a system is determined by multiplying the bus speed by the bus width. This means a system with a 64-bit bus running at 100MHz would have a theoretical maximum throughput of 800MB/sec (64 bits divided by 8 bits per byte is 8 Bytes. 8 bytes multiplied by 100 million cycles per second is 800MB/sec), however it is virtually impossible to achieve this kind of throughput.
One reason it is not possible to actually reach the theoretical maximum is because of the initial latency of the memory. As an example of this, consider an SDRAM module that has 5-1-1-1 timings on a 100MHz bus that is 64 bits wide. Assuming that no other factors slow down the data transfer, this means that in 80ns exactly 32 bytes of data have been transferred. The actual throughput in this case is only 400MB/sec (1 billion / 80ns times 32 bytes). In other words, due to the limitations of the SDRAM itself only half of the bandwidth can be utilized.