Hardware-One fietst gezellig mee op de dual celeron hype en plant twee Slot1 Celery's op een Gigabyte plank. Hier de basic info over hoe die dual Celeron truc werkt:
Let me give you a technical summary of everything we are doing :CPU pin #BR1 (bus request pin 1,BTW there is also #BR0) is not connected to land B75 (side B pin 75) on the socket edge, which is necessary for the CPU to assert bus control if CPU ID is 1. Without it SMP is not possible.
However just linking #BR1 to B75 will not work too because #BR1 is connected to V-core which is supplied with 2.0 volts and 1.5 volts is needed for SMP operation. So we drill #BR1 away from the PCB and 'float' it (0v). Next we need to up it to 1.5V by connecting it to a spare contact of RP6.
Ok, now everything else in plain english (I hope) =)
Voor het complete artikel + de plaatjes moet je ff hier kijken.
