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Door , , 0 reacties
Bron: Overclockers.com

CPUSite (een Nederlandse site bij Demon) heeft een artikel over cache in elkaar geknutseld. Hier een interessant stukje over de L3 cache van de de K6-3:

he K6-3 brings us to an other interesting point. Since the K6-3 will have its own L2 cache, the L2 cache at the mainboard will move up to being L3 cache. Problem is that this L3 cache will not add much extra performance to the on-die L2 cache.

Why? Well, the ratio L2/L3 is important, just as the ration L1/L2 is important. If information is not found in a specific level the CPU will try the next level, which is slower but also bigger. However if the next level isn't that much bigger, chances that the required information will be found are small. So the CPU will spend time looking for nothing, and could in theory even end up being slower instead of being faster. So if the L3 cache is not significly bigger benefits are small. A factor of at least 4:1 is often used. Look for instance at the L2/L1 values of the Celeron with 32:128 and the K6-3 with 64:256: both are exactly 4:1.

AMD claims in combination with 1MB cache, so L3/L2=4:1, on the mainboard an extra performance gain of 3-4%. Fine, but since most Super 7 boards are 'only' equipped with 512kB of cache this also means that those boards will probably gain nothing. I don't think it will hurt performance, but disabling might have only positive effects: increasing the overclockability.

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