The Register heeft wat info over nieuwe MII modellen en de ontwikkeling van de Japaleno:
More details of the Cyrix Jalapeno and NatSemi's strategy, have emerged after the company spoke at a VIA conference today.
That followed a presentation from motherboard manufacturer Chaintech, a company whose overheads said that the MII+366 would sample in Q2 of this year, with production in Q3.
According to Chaintech, the MCs 355-450MHz parts will start appearing in volume in April of this year.
...en over de Cyrix Japaleno:
The latest objective for the Cyrix group at NatSemi on the Jalapeno front, include high frequencies, the reduction of memory latencies, an improvement in FP and 3D performance and a tiny die size, say the overheads.
The technology will go to 0.18-microns, and have a deep pipeline with an 11 stage fetch to integer completion. Branch prediction will include a 1K entry, a four way BTB with seven bit history and prediction ROM, as well as a 16 entry return stack.
That much is not new. But insufficient attention has been given to its two issue x.86 core, the fact it is memory-centric, and its 600+MHz deep pipeline. Samples will arrive before the end of the year, promises Cyrix.
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